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Raspberry Pi Pico 2
Raspberry Pi Pico 2
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$13.00 USD
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Raspberry Pi Pico 2 delivers a significant performance boost while retaining compatibility with earlier Raspberry Pi Pico series devices. The Pico 2 offers a higher core clock speed, double the memory, more powerful Arm® cores, optional RISC‑V cores, heightened security features, and upgraded interfacing capabilities. The device is powered by the RP235x microcontroller platform (also designed by Raspberry Pi). The Pico 2 pairs RP2350 with 4MB of onboard QSPI Flash memory (versus 2MB on Raspberry Pi Pico) for code and data storage. The RP2350 MCU provides a comprehensive security architecture, built around Arm TrustZone for Cortex-M, and incorporates signed boot, 8KB of anti-fuse OTP for key storage, SHA256 acceleration, a hardware TRNG, and fast glitch detectors.
The RP2350 MCU's unique dual-core, dual-architecture capability allows users to choose between a pair of industry-standard Arm Cortex-M33 cores and a pair of open-hardware Hazard3 cores. This allows developers to experiment with the RISC‑V architecture in a stable, well-supported environment. Programmable in C / C++ and Python, Raspberry Pi Pico 2 is the ideal microcontroller board for enthusiasts and professional developers alike.
The Pico 2W is a wireless variant and features 2.4GHz 802.11n wireless LAN and Bluetooth® 5.2. This module offers improved flexibility in IoT and smart product designs.
Features
- Dual Arm Cortex-M33 cores or dual RISC-V Hazard3 RISC-V processors at 150MHz
- 520KB on-chip SRAM
- 4MB onboard QSPI flash
- Software- and hardware-compatible with Raspberry Pi Pico 1
- Drag-and-drop programming using mass storage over USB
- Castellated module allows soldering directly to carrier boards
- 2x UART
- 2x SPI controllers
- 2x I2C controllers
- 24x PWM channels
- 3x ADC channels
- 1x USB 1.1 controller and PHY, with host and device support
- 12x PIO state machines
- Open source C/C++ SDK, MicroPython support
- Robust and fully documented security
- ARM TrustZone for Cortex-M
- Optional boot signing, enforced by on-chip mask ROM with key fingerprint in OTP
- Protected OTP storage for optional boot decryption key
- Global bus filtering based on Arm or RISC-V security/privilege levels
- Peripherals, GPIOs, and DMA channels individually assignable to security domains
- Hardware mitigations for fault injection attacks
- Hardware SHA-256 accelerator
- -20°C to +85°C operating temperature range
- 1.8VDC to 5.5VDC supported input voltage range
- 51.3mm x 21.0mm x 3.9mm (LxWxH) size
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